A technique relates a resistive processing unit (RPU) array. A set of conductive column wires are configured to form cross-points at intersections between the set of conductive row wires and a set of conductive column wires. Two-terminal RPUs are hysteretic such that the two-terminal RPUs each have a conductance state defined by hysteresis, where a two-terminal RPU of the two-terminal RPUs is located at each of the cross-points.