Invention Grant
- Patent Title: Method of manufacturing integrated fan-out package
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Application No.: US16524146Application Date: 2019-07-28
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Publication No.: US10756052B2Publication Date: 2020-08-25
- Inventor: Albert Wan , Ching-Hua Hsieh , Chung-Hao Tsai , Chuei-Tang Wang , Chao-Wen Shih , Han-Ping Pu , Chien-Ling Hwang , Pei-Hsuan Lee , Tzu-Chun Tang , Yu-Ting Chiu , Jui-Chang Kuo
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/00 ; H01L23/538 ; H01L21/768 ; H01L21/48 ; H01L23/66 ; H01L25/00 ; H01L25/065 ; H01L23/31 ; H01L21/683 ; H01L23/544

Abstract:
A method of manufacturing an integrated fan-out (InFO) package includes at least the following steps. A package array is formed. A dielectric layer having a core layer formed thereon is provided. The core layer includes a plurality of cavities penetrating through the core layer. The dielectric layer and the core layer are attached onto the package array such that the core layer is located between the dielectric layer and the package array. A plurality of first conductive patches is formed on the dielectric layer above the cavities.
Public/Granted literature
- US20190355694A1 METHOD OF MANUFACTURING INTEGRATED FAN-OUT PACKAGE Public/Granted day:2019-11-21
Information query
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