Invention Grant
- Patent Title: Techniques to reduce read-modify-write overhead in hybrid DRAM/NAND memory
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Application No.: US15662072Application Date: 2017-07-27
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Publication No.: US10762000B2Publication Date: 2020-09-01
- Inventor: Mu-Tien Chang , Heehyun Nam , Youngsik Kim , Youngjin Cho , Dimin Niu , Hongzhong Zheng
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Agency: Lewis Roca Rothgerber Christie LLP
- Main IPC: G06F12/121
- IPC: G06F12/121 ; G06F12/127 ; G06F13/16 ; G06F12/0868

Abstract:
A method of choosing a cache line of a plurality of cache lines of data for eviction from a frontend memory, the method including assigning a baseline replacement score to each way of a plurality of ways of a cache, the ways respectively storing the cache lines, assigning a validity score to each way based on a degree of validity of the cache line stored in each way, assigning an eviction decision score to each way based on a function of the baseline replacement score for the way and the validity score for the way, and choosing a cache line of the way having a highest eviction decision score as the cache line for eviction.
Public/Granted literature
- US20180293175A1 TECHNIQUES TO REDUCE READ-MODIFY-WRITE OVERHEAD IN HYBRID DRAM/NAND MEMORY Public/Granted day:2018-10-11
Information query
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