Invention Grant
- Patent Title: Techniques to dynamically enable memory channels on a compute platform
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Application No.: US15476901Application Date: 2017-03-31
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Publication No.: US10762006B2Publication Date: 2020-09-01
- Inventor: Jeffrey A. Pihlman , Ramamurthy Krithivas
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F13/16
- IPC: G06F13/16 ; G06F9/44 ; G06F9/4401

Abstract:
Various embodiments are generally directed to an apparatus, method and other techniques to determine one or more memory channels of a plurality of memory channels to be enabled based on an indication received from a basic input/output system (BIOS), determine whether a number of the one or more memory channels to be enabled is greater than a maximum number of memory channels permitted, cause a platform reset if the number of the one or more memory channels is greater than the maximum number of memory channels, and permit enablement of the one or more memory channels if the number of the one or more memory channels is not greater than the maximum number of memory channels.
Public/Granted literature
- US20180285289A1 TECHNIQUES TO DYNAMICALLY ENABLE MEMORY CHANNELS ON A COMPUTE PLATFORM Public/Granted day:2018-10-04
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