Invention Grant
- Patent Title: Formation of enhanced faceted raised source/drain epi material for transistor devices
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Application No.: US16262105Application Date: 2019-01-30
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Publication No.: US10777642B2Publication Date: 2020-09-15
- Inventor: Wei Hong , George R. Mulfinger , Hui Zang , Liu Jiang , Zhenyu Hu
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L29/08
- IPC: H01L29/08 ; H01L21/8234 ; H01L29/66 ; H01L29/78 ; H01L21/28
Abstract:
One illustrative method disclosed herein may include forming a first straight sidewall spacer adjacent a gate structure of a transistor, forming a second straight sidewall spacer on the first straight sidewall spacer and forming a recessed layer of sacrificial material adjacent the second straight sidewall spacer such that the recessed layer of sacrificial material covers an outer surface of a first vertical portion of the second straight sidewall spacer while exposing a second vertical portion of the second straight sidewall spacer. In this example, the method may also include removing the second vertical portion of the second straight sidewall spacer, removing the recessed layer of sacrificial material and forming an epi material such that an edge of the epi material engages the outer surface of the first vertical portion of the second straight sidewall spacer.
Public/Granted literature
- US20200243646A1 FORMATION OF ENHANCED FACETED RAISED SOURCE/DRAIN EPI MATERIAL FOR TRANSISTOR DEVICES Public/Granted day:2020-07-30
Information query
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