Invention Grant
- Patent Title: Rounded metal trace corner for stress reduction
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Application No.: US16320680Application Date: 2016-08-16
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Publication No.: US10797014B2Publication Date: 2020-10-06
- Inventor: Dae-Woo Kim , Ajay Jain , Neha M. Patel , Rodrick J. Hendricks , Sujit Sharan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2016/047216 WO 20160816
- International Announcement: WO2018/034654 WO 20180222
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/065 ; H01L23/538

Abstract:
An integrated circuit package is disclosed. The integrated circuit package comprises a first integrated circuit die and a second integrated circuit die. The integrated circuit package further includes a substrate, wherein both the first integrated circuit die and the second integrated circuit die are connected to the substrate. The substrate includes an interconnect bridge embedded within the substrate, wherein the interconnect bridge includes at least one metal trace component, wherein the metal trace component includes rounded corners on a bottom portion of the metal trace component.
Public/Granted literature
- US20190157232A1 ROUNDED METAL TRACE CORNER FOR STRESS REDUCTION Public/Granted day:2019-05-23
Information query
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