- Patent Title: Digital bit-serial multi-multiply-and-accumulate compute in memory
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Application No.: US16145569Application Date: 2018-09-28
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Publication No.: US10831446B2Publication Date: 2020-11-10
- Inventor: Gregory K. Chen , Raghavan Kumar , Huseyin Ekin Sumbul , Phil Knag , Ram Krishnamurthy , Sasikanth Manipatruni , Amrita Mathuriya , Abhishek Sharma , Ian A. Young
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law, PC
- Main IPC: G06F7/544
- IPC: G06F7/544 ; G06F17/16 ; G06F7/501 ; G06F9/30 ; G06N3/04 ; G06N3/063

Abstract:
A memory device that includes a plurality subarrays of memory cells to store static weights and a plurality of digital full-adder circuits between subarrays of memory cells is provided. The digital full-adder circuit in the memory device eliminates the need to move data from a memory device to a processor to perform machine learning calculations. Rows of full-adder circuits are distributed between sub-arrays of memory cells to increase the effective memory bandwidth and reduce the time to perform matrix-vector multiplications in the memory device by performing bit-serial dot-product primitives in the form of accumulating m 1-bit×n-bit multiplications.
Public/Granted literature
- US20190065151A1 DIGITAL BIT-SERIAL MULTI-MULTIPLY-AND-ACCUMULATE COMPUTE IN MEMORY Public/Granted day:2019-02-28
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