Invention Grant
- Patent Title: Semiconductor structure and method forming the same
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Application No.: US16391130Application Date: 2019-04-22
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Publication No.: US10854616B2Publication Date: 2020-12-01
- Inventor: Chin-Cheng Yang
- Applicant: MACRONIX International Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Main IPC: H01L27/115
- IPC: H01L27/115 ; H01L23/544 ; H01L21/66 ; H01L21/311
Abstract:
Reference marks for forming a staircase structure are disposed along slit areas of a 3D memory structure, and slits of the 3D memory structure are formed on the slit areas. In a staircase area, the reference marks are formed by etching the topmost one of stacked layers, having a pair of a dielectric layer and a sacrificial layer, in a stacked structure.
Public/Granted literature
- US20200335509A1 SEMICONDUCTOR STRUCTURE AND METHOD FORMING THE SAME Public/Granted day:2020-10-22
Information query
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