Invention Grant
- Patent Title: Method and apparatus for using compression to improve performance of low voltage caches
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Application No.: US16230618Application Date: 2018-12-21
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Publication No.: US10884940B2Publication Date: 2021-01-05
- Inventor: John Kalamatianos , Shrikanth Ganapathy , Shomit Das , Matthew Tomei
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Liang & Cheng, PC
- Main IPC: G06F12/0893
- IPC: G06F12/0893 ; G06F11/07
Abstract:
A method of operating a cache in a computing device includes, in response to receiving a memory access request at the cache, determining compressibility of data specified by the request, selecting in the cache a destination portion for storing the data based on the compressibility of the data and a persistent fault history of the destination portion, and storing a compressed copy of the data in a non-faulted subportion of the destination portion, wherein the persistent fault history indicates that the non-faulted subportion excludes any persistent faults.
Information query
IPC分类:
