Invention Grant
- Patent Title: Removal of a bottom-most nanowire from a nanowire device stack
-
Application No.: US16475031Application Date: 2017-03-30
-
Publication No.: US10892326B2Publication Date: 2021-01-12
- Inventor: Aaron Lilak , Patrick Keys , Sean Ma , Stephen Cea , Rishabh Mehandru
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal LLP
- International Application: PCT/US2017/025207 WO 20170330
- International Announcement: WO2018/182655 WO 20181004
- Main IPC: H01L21/306
- IPC: H01L21/306 ; H01L21/3105 ; H01L21/56 ; H01L21/78 ; H01L23/31 ; H01L27/088 ; H01L29/78 ; H01L29/06 ; H01L29/08 ; H01L29/10 ; H01L29/40 ; H01L29/423 ; H01L29/66
Abstract:
An apparatus is provided which comprises: a plurality of nanowire transistors stacked vertically, wherein each nanowire transistor of the plurality of nanowire transistors comprises a corresponding nanowire of a plurality of nanowires; and a gate stack, wherein the gate stack fully encircles at least a section of each nanowire of the plurality of nanowires.
Public/Granted literature
- US20190333990A1 REMOVAL OF A BOTTOM-MOST NANOWIRE FROM A NANOWIRE DEVICE STACK Public/Granted day:2019-10-31
Information query
IPC分类:
