Invention Grant
- Patent Title: Semiconductor layered device with data bus inversion
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Application No.: US16840281Application Date: 2020-04-03
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Publication No.: US10922262B2Publication Date: 2021-02-16
- Inventor: Yuki Ebihara , Seiji Narui
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G06F13/42 ; G11C11/4093 ; G11C11/402 ; H01L27/108

Abstract:
Apparatuses and methods of data transmission between semiconductor chips are described. An example apparatus includes: a data bus inversion (DBI) circuit that receives first, second and third input data in order, and further provides first, second and third output data, either with or without data bus inversion. The DBI circuit includes a first circuit that latches the first input data and the third input data; a second circuit that latches the second input data; a first DBI calculator circuit that performs first DBI calculation on the latched first input data and the latched second input data responsive to the first circuit latching the first input data and the second circuit latching the second input data, respectively; and a second DBI calculator circuit that performs second DBI calculation on the latched second data and the latched third input data responsive to the first circuit latching the third input data.
Public/Granted literature
- US20200233828A1 SEMICONDUCTOR LAYERED DEVICE WITH DATA BUS INVERSION Public/Granted day:2020-07-23
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