- Patent Title: Gallium nitride NMOS on Si (111) co-integrated with a silicon PMOS
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Application No.: US16884099Application Date: 2020-05-27
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Publication No.: US10943836B2Publication Date: 2021-03-09
- Inventor: Marko Radosavljevic , Sansaptak Dasgupta , Valluri R. Rao , Han Wui Then
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Patent Capital Group
- Main IPC: H01L21/8258
- IPC: H01L21/8258 ; H01L29/778 ; H01L29/78 ; H01L27/092 ; H01L29/06 ; H01L29/66 ; H01L29/04 ; H01L27/12 ; H01L21/762 ; H01L27/06 ; H01L29/20 ; H01L29/423 ; H01L29/417
Abstract:
A complementary metal oxide semiconductor (CMOS) device that includes a gallium nitride n-type MOS and a silicon P-type MOS is disclosed. The device includes silicon 111 substrate, a gallium nitride transistor formed in a trench in the silicon 111 substrate, the gallium nitride transistor comprising a source electrode, a gate electrode, and a drain electrode. The device further includes a silicon/polysilicon layer formed over the gallium nitride transistor.
Public/Granted literature
- US20200286789A1 GALLIUM NITRIDE NMOS ON SI (111) CO-INTEGRATED WITH A SILICON PMOS Public/Granted day:2020-09-10
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