The present disclosure relates to a testing device and techniques of testing semiconductor structures and, more particularly, to an absolute phase measurement testing device and technique of testing semiconductor structures. The structure includes: a first frequency input source which provides a first signal to an up-converter at an input side of a test fixture; a down-converter on an output side of the test fixture; a second frequency signal source which provides a second signal at a higher frequency than the first signal to the up-converter and the down-converter on the output side of the test fixture; a bypass path which bypasses the test fixture and provides connection between the up-converter and the down-converter; and a digitizer that is connected to an output side of the down-converter.