- Patent Title: Fast page fault handling process implemented on persistent memory
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Application No.: US16442267Application Date: 2019-06-14
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Publication No.: US10949356B2Publication Date: 2021-03-16
- Inventor: James A. Boyd , Robert J. Royer, Jr. , Lily P. Looi , Gary C. Chow , Zvika Greenfield , Chia-Hung S. Kuo , Dale J. Juenemann
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: G06F12/1009
- IPC: G06F12/1009 ; G06F12/1027

Abstract:
A method is described. The method includes receiving notice of a page fault. A page targeted by a memory access instruction that resulted in the page fault residing in persistent memory without system memory status. In response to the page fault, updating page table information to include a translation that points to the page in persistent memory such that the page changes to system memory status without moving the page and system memory expands to include the page in persistent memory.
Public/Granted literature
- US20190303300A1 FAST PAGE FAULT HANDLING PROCESS IMPLEMENTED ON PERSISTENT MEMORY Public/Granted day:2019-10-03
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