Invention Grant
- Patent Title: Method of fabricating semiconductor structure
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Application No.: US16693389Application Date: 2019-11-25
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Publication No.: US10964547B2Publication Date: 2021-03-30
- Inventor: Chin-Han Meng , Chih-Hsien Hsu , Jr-Sheng Chen , An-Chi Li , Lin-Ching Huang , Yu-Pei Chiang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L21/3065
- IPC: H01L21/3065 ; B81C1/00 ; H01L21/308 ; H01L21/311

Abstract:
A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.
Public/Granted literature
- US20200098583A1 METHOD OF FABRICATING SEMICONDUCTOR STRUCUTRE Public/Granted day:2020-03-26
Information query
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