Invention Grant
- Patent Title: Wear leveling for random access and ferroelectric memory
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Application No.: US16504837Application Date: 2019-07-08
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Publication No.: US10971203B2Publication Date: 2021-04-06
- Inventor: Richard E. Fackenthal , Daniele Vimercati , Duane R. Mills
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C11/22 ; G06F11/10 ; G11C29/52

Abstract:
Methods, systems, and devices related to wear leveling for random access and ferroelectric memory are described. Non-volatile memory devices, e.g., ferroelectric random access memory (FeRAM) may utilize wear leveling to extend life time of the memory devices by avoiding reliability issues due to a limited cycling capability. A wear-leveling pool, or number of cells used for a wear-leveling application, may be expanded by softening or avoiding restrictions on a source page and a destination page within a same section of memory array. In addition, error correction code may be applied when moving data from the source page to the destination page to avoid duplicating errors present in the source page.
Public/Granted literature
- US20190392882A1 WEAR LEVELING FOR RANDOM ACCESS AND FERROELECTRIC MEMORY Public/Granted day:2019-12-26
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