Invention Grant
- Patent Title: Method for forming capacitor, semiconductor device, module, and electronic device
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Application No.: US15991195Application Date: 2018-05-29
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Publication No.: US10971491B2Publication Date: 2021-04-06
- Inventor: Tetsuhiro Tanaka , Yutaka Okazaki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi
- Agency: Robinson Intellectual Property Law Office
- Agent Eric J. Robinson
- Priority: JPJP2015-214050 20151030
- Main IPC: H01L27/07
- IPC: H01L27/07 ; H01L29/786 ; H01L29/94 ; H01L27/12 ; H01G4/008 ; H01G4/10 ; H01G4/40 ; H01L29/66 ; H05K1/18 ; H01L21/8258 ; H01L27/06 ; H01L27/1156
Abstract:
A miniaturized transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A transistor having a large amount of on-state current is provided. A semiconductor device including the transistor is provided. A semiconductor device with high integration is provided. A novel capacitor is provided. The capacitor includes a first conductor, a second conductor, and an insulator. The first conductor includes a region overlapping with the second conductor with the insulator provided therebetween. The first conductor includes tungsten and silicon. The insulator includes a silicon oxide film that is formed by oxidizing the first conductor.
Public/Granted literature
- US20180277533A1 METHOD FOR FORMING CAPACITOR, SEMICONDUCTOR DEVICE, MODULE, AND ELECTRONIC DEVICE Public/Granted day:2018-09-27
Information query
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