公开(公告)号：US11495691B2

公开(公告)日：2022-11-08

申请号：US17056072

申请日：2019-05-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshihiko Takeuchi ,  Naoto Yamade ,  Yutaka Okazaki ,  Sachiaki Tezuka ,  Shunpei Yamazaki

IPC: H01L29/78 ,  H01L29/786 ,  H01L21/8234 ,  H01L27/06 ,  H01L27/088 ,  H01L27/108 ,  H01L27/12 ,  H01L29/792

Abstract: The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.

公开(公告)号：US11024743B2

公开(公告)日：2021-06-01

申请号：US16378622

申请日：2019-04-09

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yoshinobu Asami ,  Yutaka Okazaki ,  Satoru Okamoto ,  Shinya Sasagawa

IPC: H01L29/786 ,  H01L29/06 ,  H01L21/02 ,  H01L29/423 ,  H01L21/475 ,  H01L29/66 ,  H01L21/4757 ,  H01L21/67 ,  C23C16/40 ,  C23C16/455 ,  H01L27/12

Abstract: A semiconductor device includes a first oxide insulating layer over a first insulating layer, an oxide semiconductor layer over the first oxide insulating layer, a source electrode layer and a drain electrode layer over the oxide semiconductor layer, a second insulating layer over the source electrode layer and the drain electrode layer, a second oxide insulating layer over the oxide semiconductor layer, a gate insulating layer over the second oxide insulating layer, a gate electrode layer over the gate insulating layer, and a third insulating layer over the second insulating layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer. A side surface portion of the second insulating layer is in contact with the second oxide insulating layer. The gate electrode layer includes a first region and a second region. The first region has a width larger than that of the second region.

公开(公告)号：US10971491B2

公开(公告)日：2021-04-06

申请号：US15991195

申请日：2018-05-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro Tanaka ,  Yutaka Okazaki

IPC: H01L27/07 ,  H01L29/786 ,  H01L29/94 ,  H01L27/12 ,  H01G4/008 ,  H01G4/10 ,  H01G4/40 ,  H01L29/66 ,  H05K1/18 ,  H01L21/8258 ,  H01L27/06 ,  H01L27/1156

Abstract: A miniaturized transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A transistor having a large amount of on-state current is provided. A semiconductor device including the transistor is provided. A semiconductor device with high integration is provided. A novel capacitor is provided. The capacitor includes a first conductor, a second conductor, and an insulator. The first conductor includes a region overlapping with the second conductor with the insulator provided therebetween. The first conductor includes tungsten and silicon. The insulator includes a silicon oxide film that is formed by oxidizing the first conductor.

公开(公告)号：US10522689B2

公开(公告)日：2019-12-31

申请号：US15605211

申请日：2017-05-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari Sasaki ,  Hitomi Sato ,  Kosei Noda ,  Yuta Endo ,  Mizuho Ikarashi ,  Keitaro Imai ,  Atsuo Isobe ,  Yutaka Okazaki

IPC: H01L29/786 ,  H01L29/66

Abstract: It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.

公开(公告)号：US10199508B2

公开(公告)日：2019-02-05

申请号：US15704093

申请日：2017-09-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Yoshinobu Asami ,  Yutaka Okazaki ,  Motomu Kurata ,  Katsuaki Tochibayashi ,  Shinya Sasagawa ,  Kensuke Yoshizumi ,  Hideomi Suzawa

IPC: H01L29/49 ,  H01L29/786 ,  H01L29/66 ,  H01L21/4757 ,  H01L21/47 ,  H01L21/477 ,  H01L33/00 ,  H01L27/12

Abstract: A miniaturized transistor, a transistor with low parasitic capacitance, a transistor with high frequency characteristics, or a semiconductor device including the transistor is provided. The semiconductor device includes a first insulator, an oxide semiconductor over the first insulator, a first conductor and a second conductor that are in contact with the oxide semiconductor, a second insulator that is over the first and second conductors and has an opening reaching the oxide semiconductor, a third insulator over the oxide semiconductor and the second insulator, and a fourth conductor over the third insulator. The first conductor includes a first region and a second region. The second conductor includes a third region and a fourth region. The second region faces the third region with the first conductor and the first insulator interposed therebetween. The second region is thinner than the first region. The third region is thinner than the fourth region.

公开(公告)号：US09691905B2

公开(公告)日：2017-06-27

申请号：US15182812

申请日：2016-06-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo Ito ,  Daisuke Matsubayashi ,  Masaharu Nagai ,  Yoshiaki Yamamoto ,  Takashi Hamada ,  Yutaka Okazaki ,  Shinya Sasagawa ,  Motomu Kurata ,  Naoto Yamade

IPC: H01L21/00 ,  H01L21/16 ,  H01L29/786 ,  H01L29/66 ,  H01L21/425 ,  H01L21/46 ,  H01L27/12

CPC classification number: H01L29/78693 ,  H01L21/425 ,  H01L21/46 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1262 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7782 ,  H01L29/7854 ,  H01L29/7855 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device includes a first insulating layer over a substrate, a first metal oxide layer over the first insulating layer, an oxide semiconductor layer over the first metal oxide layer, a second metal oxide layer over the oxide semiconductor layer, a gate insulating layer over the second metal oxide layer, a second insulating layer over the second metal oxide layer, and a gate electrode layer over the gate insulating layer. The gate insulating layer includes a region in contact with a side surface of the gate electrode layer. The second insulating layer includes a region in contact with the gate insulating layer. The oxide semiconductor layer includes first to third regions. The first region includes a region overlapping with the gate electrode layer. The second region, which is between the first and third regions, includes a region overlapping with the gate insulating layer or the second insulating layer. The second and third regions each include a region containing an element N (N is phosphorus, argon, or xenon).

公开(公告)号：US09680024B2

公开(公告)日：2017-06-13

申请号：US15145896

申请日：2016-05-04

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Yutaka Okazaki

IPC: H01L29/12 ,  H01L29/10 ,  H01L29/786 ,  H01L29/51 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78 ,  H01L27/105

CPC classification number: H01L29/78606 ,  H01L27/1052 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/66969 ,  H01L29/785 ,  H01L29/78603 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: To provide a semiconductor device that includes an oxide semiconductor and is miniaturized while keeping good electrical properties. In the semiconductor device, an oxide semiconductor layer filling a groove is surrounded by insulating layers including an aluminum oxide film containing excess oxygen. Excess oxygen contained in the aluminum oxide film is supplied to the oxide semiconductor layer, in which a channel is formed, by heat treatment in a manufacturing process of the semiconductor device. Moreover, the aluminum oxide film forms a barrier against oxygen and hydrogen, which inhibits the removal of oxygen from the oxide semiconductor layer surrounded by the insulating layers including an aluminum oxide film and the entry of impurities such as hydrogen in the oxide semiconductor layer. Thus, a highly purified intrinsic oxide semiconductor layer can be obtained. The threshold voltage is controlled effectively by gate electrode layers formed over and under the oxide semiconductor layer.

公开(公告)号：US09666724B2

公开(公告)日：2017-05-30

申请号：US14942354

申请日：2015-11-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Yutaka Okazaki

IPC: H01L29/10 ,  H01L29/12 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/24 ,  H01L29/517 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78648 ,  H01L29/78696

Abstract: To provide a semiconductor device that includes an oxide semiconductor and is miniaturized while keeping good electrical properties. In the semiconductor device, an oxide semiconductor layer is surrounded by an insulating layer including an aluminum oxide film containing excess oxygen. Excess oxygen in the aluminum oxide film is supplied to the oxide semiconductor layer including a channel by heat treatment in a manufacturing process of the semiconductor device. Furthermore, the aluminum oxide film forms a barrier against oxygen and hydrogen. It is thus possible to suppress the removal of oxygen from the oxide semiconductor layer surrounded by the insulating layer including an aluminum oxide film, and the entry of impurities such as hydrogen into the oxide semiconductor layer; as a result, the oxide semiconductor layer can be made highly intrinsic. In addition, gate electrode layers over and under the oxide semiconductor layer control the threshold voltage effectively.

公开(公告)号：US20160099259A1

公开(公告)日：2016-04-07

申请号：US14870912

申请日：2015-09-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka Okazaki ,  Tomoaki MORIWAKA ,  Shinya SASAGAWA ,  Takashi OHTSUKI

IPC: H01L27/12 ,  H01L21/768

CPC classification number: H01L27/124 ,  H01L21/76849 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L27/1255 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78609 ,  H01L29/78648 ,  H01L29/78654 ,  H01L29/7869

Abstract: To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. An end of the first conductor is at a level lower than or equal to the top level of the opening. The top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.

Abstract translation: 提供具有低功耗的小型化半导体器件。 制造布线层的方法包括以下步骤：在第一绝缘体上形成第二绝缘体; 在所述第二绝缘体上形成第三绝缘体; 在第三绝缘体中形成开口，使其到达第二绝缘体; 在第三绝缘体和开口中形成第一导体; 在所述第一导体上形成第二导体; 并且在形成第二导体之后，进行抛光处理以去除第三绝缘体的顶表面上方的第一和第二导体的部分。 第一导体的端部处于低于或等于开口顶部水平的水平。 第二导体的顶表面处于低于或等于第一导体末端的水平面。

公开(公告)号：US09269797B2

公开(公告)日：2016-02-23

申请号：US14632081

申请日：2015-02-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Naoto Yamade ,  Yuhei Sato ,  Yutaka Okazaki ,  Shunpei Yamazaki

IPC: H01L21/00 ,  H01L21/20 ,  H01L21/36 ,  H01L29/66 ,  H01L29/786 ,  H01L21/383 ,  H01L21/44 ,  H01L21/477

CPC classification number: H01L27/1274 ,  H01L21/02565 ,  H01L21/02609 ,  H01L21/02667 ,  H01L21/383 ,  H01L21/44 ,  H01L21/477 ,  H01L27/1225 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.