Invention Grant
- Patent Title: Methods of fabricating magneto-resistive random-access memory (MRAM) devices with self-aligned top electrode via and structures formed thereby
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Application No.: US16440011Application Date: 2019-06-13
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Publication No.: US10985312B2Publication Date: 2021-04-20
- Inventor: Wei-Hao Liao , Hsi-Wen Tien , Chih-Wei Lu , Pin-Ren Dai , Chung-Ju Lee
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L43/12
- IPC: H01L43/12 ; H01F41/34 ; H01L43/02 ; H01L27/22 ; H01F10/32

Abstract:
A method of fabricating an MRAM device includes forming a bottom electrode over a semiconductor substrate, forming a magnetic tunnel junction (MTJ) structure on the bottom electrode, and forming a top electrode on the MTJ structure. The method also includes forming spacers on sidewalls of the top electrode and the MTJ structure, and depositing a first dielectric layer to surround the spacers. The method further includes selectively depositing a patterned etch stop layer on the first dielectric layer and the spacers. In addition, the method includes depositing a second dielectric layer on the patterned etch stop layer and the top electrode, forming a via hole in the second dielectric layer to expose the top electrode, and forming a top electrode via in the via hole.
Information query
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