Invention Grant
- Patent Title: Bypassing equalization at lower data rates
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Application No.: US16902151Application Date: 2020-06-15
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Publication No.: US11005692B2Publication Date: 2021-05-11
- Inventor: Debendra Das Sharma
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alliance IP, LLC
- Main IPC: H04L27/01
- IPC: H04L27/01 ; H04L25/03

Abstract:
A port of a computing device is to connect to another device over a link and use equalization logic to perform equalization of the link at a plurality of different data rates. The equalization logic may identify that the other device supports bypassing a sequential equalization mode, determine a maximum data rate supported by the devices on the link, and participate in equalization of the link at the maximum supported data rate before equalizing the link at one or more other data rates lower than the maximum supported data rate in the plurality of data rates.
Public/Granted literature
- US20200313940A1 BYPASSING EQUALIZATION AT LOWER DATA RATES Public/Granted day:2020-10-01
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