Invention Grant
- Patent Title: Capacitor loop structure
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Application No.: US16462197Application Date: 2017-11-20
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Publication No.: US11031359B2Publication Date: 2021-06-08
- Inventor: Jenny Shio Yin Ong , Tin Poay Chuah , Chin Lee Kuan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Priority: MYPI2016704710 20161220
- International Application: PCT/US2017/062513 WO 20171120
- International Announcement: WO2018/118307 WO 20180628
- Main IPC: H01R9/00
- IPC: H01R9/00 ; H01L23/64 ; H01L23/498 ; H05K1/18 ; H05K1/02 ; H01L23/50 ; H01L23/13

Abstract:
A capacitor loop substrate assembly may include a substrate with a loop shape, one or more capacitors or other electronic components on the substrate, and an opening in the substrate to allow the capacitor loop substrate assembly to be coupled to an integrated circuit package, such as a package including a die. Interconnects and/or contacts for interconnects may be formed in an integrated circuit package to couple the capacitor loop substrate assembly to the integrated circuit package.
Public/Granted literature
- US20190279949A1 CAPACITOR LOOP STRUCTURE Public/Granted day:2019-09-12
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