- 专利标题: Capacitor loop structure
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申请号: US16462197申请日: 2017-11-20
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公开(公告)号: US11031359B2公开(公告)日: 2021-06-08
- 发明人: Jenny Shio Yin Ong , Tin Poay Chuah , Chin Lee Kuan
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Schwabe, Williamson & Wyatt, P.C.
- 优先权: MYPI2016704710 20161220
- 国际申请: PCT/US2017/062513 WO 20171120
- 国际公布: WO2018/118307 WO 20180628
- 主分类号: H01R9/00
- IPC分类号: H01R9/00 ; H01L23/64 ; H01L23/498 ; H05K1/18 ; H05K1/02 ; H01L23/50 ; H01L23/13
摘要:
A capacitor loop substrate assembly may include a substrate with a loop shape, one or more capacitors or other electronic components on the substrate, and an opening in the substrate to allow the capacitor loop substrate assembly to be coupled to an integrated circuit package, such as a package including a die. Interconnects and/or contacts for interconnects may be formed in an integrated circuit package to couple the capacitor loop substrate assembly to the integrated circuit package.
公开/授权文献
- US20190279949A1 CAPACITOR LOOP STRUCTURE 公开/授权日:2019-09-12
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