Invention Grant
- Patent Title: Bias voltage connections in RF power amplifier packaging
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Application No.: US16414955Application Date: 2019-05-17
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Publication No.: US11031913B2Publication Date: 2021-06-08
- Inventor: Madhu Chidurala , Marvin Marbell , Simon Ward
- Applicant: Cree, Inc.
- Applicant Address: US NC Durham
- Assignee: Cree, Inc.
- Current Assignee: Cree, Inc.
- Current Assignee Address: US NC Durham
- Agency: Coats & Bennett, PLLC
- Main IPC: H03F1/10
- IPC: H03F1/10 ; H03F1/02 ; H03F1/56 ; H03F3/213

Abstract:
In integrating RF power amplifier circuits on a package, at least one bias voltage is coupled to at least one amplifier circuit on the package via two or more pins/connectors. In particular, at least one of a gate and drain bias voltage is coupled to one or more amplifier circuits via at least two pins/connectors. In some embodiments, the two or more bias voltage pins/connectors are connected together on the package, placing the pins/connectors in parallel, which reduces an inductance associated with the pins/connectors. In some embodiments, at least of the two pins/connectors connected to the same bias voltage are disposed on either side of an RF signal pin/conductor, simplifying the routing of signals on the package, affording greater flexibility of placement and routing on the package.
Information query
IPC分类: