Invention Grant
- Patent Title: Techniques for fabricating charge balanced (CB) trench-metal-oxide-semiconductor field-effect transistor (MOSFET) devices
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Application No.: US16147216Application Date: 2018-09-28
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Publication No.: US11056586B2Publication Date: 2021-07-06
- Inventor: Stephen Daley Arthur , Alexander Viktorovich Bolotnikov , Reza Ghandi , David Alan Lilienfeld , Peter Almem Losee
- Applicant: General Electric Company
- Applicant Address: US NY Schenectady
- Assignee: General Electric Company
- Current Assignee: General Electric Company
- Current Assignee Address: US NY Schenectady
- Agency: Fletcher Yoder, P.C.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/10 ; H01L29/66 ; H01L29/16 ; H01L21/04 ; H01L29/08

Abstract:
A charge balanced (CB) trench-metal-oxide-semiconductor field-effect transistor (MOSFET) device may include a charge balanced (CB) layer defined within a first epitaxial (epi) layer that has a first conductivity type. The CB layer may include charge balanced (CB) regions that has a second conductivity type. The CB trench-MOSFET device may include a device layer defined in a second epi layer and having the first conductivity type, where the device layer is disposed on the CB layer. The device layer may include a source region, a base region, a trench feature, and a shield region having the second conductivity type disposed at a bottom surface of the trench feature. The device layer may also include a charge balanced (CB) bus region having the second conductivity type that extends between and electrically couples the CB regions of the CB layer to at least one region of the device layer having the second conductivity type.
Information query
IPC分类: