In some embodiments, the present disclosure relates to an integrated chip that includes a silicon-on-insulator (SOI) substrate having an insulator layer between an active layer and a base layer. A semiconductor device and a shallow trench isolation (SIT) structure are disposed on a frontside of the SOI substrate. A semiconductor core structure continuously surrounds the semiconductor device and extends through the STI structure and towards a backside of the SOI substrate. A first insulator liner portion and a second insulator liner portion surround a first outermost sidewall and a second outermost sidewall of the semiconductor core structure. The first and second insulator liner portions respectively have a first protrusion and a second protrusion. The first and second protrusions are arranged between the STI structure and the insulator layer of the SOI substrate.