Invention Grant
- Patent Title: Face-to-face through-silicon via multi-chip semiconductor apparatus with redistribution layer packaging and methods of assembling same
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Application No.: US16284239Application Date: 2019-02-25
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Publication No.: US11107751B2Publication Date: 2021-08-31
- Inventor: Loke Yip Foo , Choong Kooi Chee
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Priority: MYPI2018701247 20180327
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/00 ; H01L25/18 ; H01L23/31 ; H01L23/538 ; H01L23/367 ; H01L21/56

Abstract:
Reduced-profile semiconductor device apparatus are achieved by thinning a semiconductive device substrate at a backside surface to expose a through-silicon via pillar, forming a recess to further expose the through-silicon via pillar, and by seating an electrical bump in the recess to contact both the through-silicon via pillar and the recess. In an embodiment, the electrical bump contacts a semiconductor package substrate to form a low-profile semiconductor device apparatus. In an embodiment, the electrical bump contacts a subsequent die to form a low-profile semiconductor device apparatus.
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Information query
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