- 专利标题： Planarization of semiconductor packages and structures resulting therefrom
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申请号： US16570776申请日： 2019-09-13
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公开(公告)号： US11127644B2公开(公告)日： 2021-09-21
- 发明人: Chi-Yang Yu , Hai-Ming Chen , Yu-Min Liang , Jung Wei Cheng , Chien-Hsun Lee
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsinchu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsinchu
- 代理机构： Slater Matsil, LLP
- 主分类号： H01L23/18
- IPC分类号： H01L23/18 ; H01L21/3105 ; H01L23/31 ; H01L21/48 ; H01L21/56 ; H01L23/29 ; H01L21/683 ; H01L25/065 ; H01L23/00
摘要：
An embodiment method includes encapsulating a semiconductor die in an encapsulant, planarizing the encapsulant, and depositing a polymer material on the encapsulant. The method further includes planarizing the polymer material and forming a metallization pattern on the polymer material. The metallization pattern electrically connects a die connector of the semiconductor die to a conductive feature disposed outside of the semiconductor die.
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