- 专利标题: Latch-type sense amplifier for a non-volatile memory with reduced margin between supply voltage and bitline-selection voltage
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申请号: US16931335申请日: 2020-07-16
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公开(公告)号: US11133064B2公开(公告)日: 2021-09-28
- 发明人: Marcella Carissimi , Laura Capecchi , Marco Pasotti , Fabio Enrico Carlo Disegni
- 申请人: STMicroelectronics S.r.l.
- 申请人地址: IT Agrate Brianza
- 专利权人: STMicroelectronics S.r.l.
- 当前专利权人: STMicroelectronics S.r.l.
- 当前专利权人地址: IT Agrate Brianza
- 代理机构: Slater Matsil, LLP
- 优先权: IT102019000012153 20190717
- 主分类号: G11C7/02
- IPC分类号: G11C7/02 ; G11C13/00
摘要:
A sense amplifier and a method for accessing a memory device are disclosed. In an embodiment a sense amplifier for a memory device includes a first input node selectively coupled to a first memory cell through a first local bitline and a first main bitline, a second input node selectively coupled through a second local bitline and a second main bitline to a second memory cell or to a reference generator configured to generate a reference current, a first current generator controllable so as to inject a first variable current into the first input node, a second current generator controllable so as to inject a second variable current into the second input node, a first branch coupled to the first input node and comprising a first switch circuit, a first sense transistor and a first forcing transistor and a second branch coupled to the second input node and including a second switch circuit, a second sense transistor and a second forcing transistor.
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