Invention Grant
- Patent Title: Charge loss failure mitigation
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Application No.: US16903861Application Date: 2020-06-17
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Publication No.: US11133071B2Publication Date: 2021-09-28
- Inventor: Vipul Patel
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C16/00
- IPC: G11C16/00 ; G11C16/26 ; G11C16/10 ; G11C16/30 ; G11C16/04 ; G11C16/08 ; G11C16/28 ; G11C11/56

Abstract:
Memories including a controller configured to cause the memory to read a plurality of memory cells using a read voltage having a particular voltage level, determine a number of memory cells of a first subset of memory cells of the plurality of memory cells having a particular data state in response to the read voltage having the particular voltage level, and in response to determining that the number of memory cells of the first subset of memory cells having the particular data state is less than a particular threshold, adjust the voltage level of the read voltage based on the number of memory cells of the first subset of memory cells having the particular data state, and re-read the plurality of memory cells using the read voltage having the adjusted voltage level.
Public/Granted literature
- US20200312411A1 CHARGE LOSS FAILURE MITIGATION Public/Granted day:2020-10-01
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