Invention Grant
- Patent Title: Multi-layer fin structure
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Application No.: US16735379Application Date: 2020-01-06
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Publication No.: US11133386B2Publication Date: 2021-09-28
- Inventor: Bwo-Ning Chen , Xusheng Wu , Chang-Miao Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L27/092 ; H01L29/78 ; H01L29/161 ; H01L29/66 ; H01L21/8238 ; H01L21/02 ; H01L21/265
Abstract:
The present disclosure provides one embodiment of a semiconductor structure. The structure includes a semiconductor substrate; a fin extending above the semiconductor substrate, wherein the fin includes a first layer over the semiconductor substrate and a second layer over the first layer, wherein the first layer includes silicon germanium having a first concentration of germanium, and wherein the second layer includes silicon germanium having a second concentration of germanium less than the first concentration of germanium; and a gate stack disposed over the fin.
Public/Granted literature
- US20210066457A1 Multi-Layer Fin Structure Public/Granted day:2021-03-04
Information query
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