Invention Grant
- Patent Title: Techniques to implement a hybrid error correction code scheme
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Application No.: US17031772Application Date: 2020-09-24
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Publication No.: US11157359B2Publication Date: 2021-10-26
- Inventor: Byoungchan Oh , Wei Wu
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/10 ; H03M13/29 ; H03M13/15
Abstract:
Examples include techniques to improve implement an error correction codeword (ECC) scheme to protect data stored to a memory from both hard and random bit errors using a hybrid ECC scheme that includes generation of first and second codewords to protect the data.
Public/Granted literature
- US20210019225A1 TECHNIQUES TO IMPLEMENT A HYBRID ERROR CORRECTION CODE SCHEME Public/Granted day:2021-01-21
Information query
