Invention Grant
- Patent Title: Channel layer formed in an art trench
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Application No.: US16631363Application Date: 2017-09-29
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Publication No.: US11164974B2Publication Date: 2021-11-02
- Inventor: Willy Rachmady , Matthew V. Metz , Gilbert Dewey , Nancy Zelick , Harold Kennel , Nicholas G. Minutillo , Cheng-Ying Huang
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2017/054225 WO 20170929
- International Announcement: WO2019/066885 WO 20190404
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/201 ; H01L21/8234 ; H01L27/088

Abstract:
A transistor includes a semiconductor fin with a subfin layer of a subfin material selected from a first group III-V compound a channel layer of a channel material directly on the subfin layer and extending upwardly therefrom, the channel material being a second group III-V compound different from the first group III-V compound. A gate structure is in direct contact with the channel layer of the semiconductor fin, where the gate structure is further in direct contact with one of (i) a top surface of the subfin layer, the top surface being exposed where the channel layer meets the subfin layer because the channel layer is narrower than the subfin layer, or (ii) a liner layer of liner material in direct contact with opposing sidewalls of the subfin layer, the liner material being distinct from the first and second group III-V compounds.
Public/Granted literature
- US20200220017A1 IMPROVED CHANNEL LAYER FORMED IN AN ART TRENCH Public/Granted day:2020-07-09
Information query
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