Invention Grant
- Patent Title: Translation circuitry for an interconnection in an active interposer of a semiconductor package
-
Application No.: US16726132Application Date: 2019-12-23
-
Publication No.: US11216397B2Publication Date: 2022-01-04
- Inventor: Lai Guan Tang , Ankireddy Nalamalpu , Dheeraj Subbareddy , Chee Hak Teh , Md Altaf Hossain
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Fletcher Yoder, P.C.
- Main IPC: G06F13/20
- IPC: G06F13/20 ; G06F13/40
Abstract:
Systems and method include one or more die coupled to an interposer. The interposer includes interconnection circuitry configured to electrically connect the one or more die together via the interposer. The interposer also includes translation circuitry configured to translate communications as they pass through the interposer. For instance, in the interposer, the translation circuitry translates communications, in the interposer, from a first protocol of a first die of the one or more die to a second protocol of a second die of the one or more die.
Information query
