Invention Grant
- Patent Title: Integrated assemblies comprising voids between active regions and conductive shield plates, and methods of forming integrated assemblies
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Application No.: US16502584Application Date: 2019-07-03
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Publication No.: US11217588B2Publication Date: 2022-01-04
- Inventor: Mitsunari Sukekawa , Hiroaki Taketani
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L21/768 ; H01L21/311 ; H01L29/08 ; H01L29/10 ; H01L29/66 ; H01L29/40 ; H01L21/764 ; H01L49/02 ; H01L29/78 ; H01L23/528
Abstract:
Some embodiments include integrated memory having a wordline, a shield plate, and an access device. The access device includes first and second diffusion regions, and a channel region. The channel region is vertically disposed between the first and second diffusion regions. The access device is adjacent to the wordline and to the shield plate. A part of the wordline is proximate a first side surface of the channel region with an intervention of a first insulating region therebetween. A part of the shield plate is proximate a second side surface of the channel region with an intervention of a second insulating region therebetween. The first insulating region includes an insulative material. The second insulating region includes a void. Some embodiments include memory arrays. Some embodiments include methods of forming integrated assemblies.
Public/Granted literature
Information query
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