Invention Grant
- Patent Title: Negative capacitance transistor with external ferroelectric structure
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Application No.: US16572341Application Date: 2019-09-16
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Publication No.: US11222958B2Publication Date: 2022-01-11
- Inventor: Chi-Hsing Hsu , Sai-Hooi Yeong , Ching-Wei Tsai , Kuan-Lun Cheng , Chih-Hao Wang , Min Cao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/51
- IPC: H01L29/51 ; H01L27/092 ; H01L29/06 ; H01L21/8238 ; H01L21/02

Abstract:
A first fin structure is disposed over a substrate. The first fin structure contains a semiconductor material. A gate dielectric layer is disposed over upper and side surfaces of the first fin structure. A gate electrode layer is formed over the gate dielectric layer. A second fin structure is disposed over the substrate. The second fin structure is physically separated from the first fin structure and contains a ferroelectric material. The second fin structure is electrically coupled to the gate electrode layer.
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