Invention Grant
- Patent Title: Split gate memory cell fabrication and system
-
Application No.: US16426222Application Date: 2019-05-30
-
Publication No.: US11239346B2Publication Date: 2022-02-01
- Inventor: John Howard MacPeak , Douglas Ticknor Grider , Brian K. Kirkpatrick
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Andrew R. Ralston; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/311 ; H01L29/40 ; H01L27/11546 ; H01L29/423 ; H01L21/28

Abstract:
A method of forming an integrated circuit relative to a wafer comprising a semiconductor substrate. The method first forms a first dielectric layer having a first thickness and along the substrate, the first forming step comprising plasma etching the wafer in a first substrate area and a second substrate area and thereafter growing the first dielectric layer in the first substrate area and the second substrate area. After the first step, the method second forms a second dielectric layer having a second thickness and along the substrate in the second substrate area, the second thickness less than the first thickness, the second forming step comprising removal of the first dielectric layer in the second substrate area without plasma and until a surface of the substrate is exposed and growing the second dielectric layer in at least a portion of the surface.
Public/Granted literature
- US20200381541A1 SPLIT GATE MEMORY CELL FABRICATION AND SYSTEM Public/Granted day:2020-12-03
Information query
IPC分类: