Invention Grant
- Patent Title: Cache coherence shared state suppression
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Application No.: US16882257Application Date: 2020-05-22
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Publication No.: US11243883B2Publication Date: 2022-02-08
- Inventor: Abhijeet Ashok Chachad , David Matthew Thompson , Timothy David Anderson , Kai Chirca
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Brian D. Graham; Charles A. Brill; Frank D. Cimino
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/0811 ; G06F12/0815 ; G06F12/128 ; G06F12/0817 ; G06F12/084 ; G06F9/30 ; G06F11/30 ; G06F12/0808 ; G06F13/16 ; G06F9/38 ; G06F9/46 ; G06F9/54 ; G06F12/0895

Abstract:
A method includes receiving, by a level two (L2) controller, a first request for a cache line in a shared cache coherence state; mapping, by the L2 controller, the first request to a second request for a cache line in an exclusive cache coherence state; and responding, by the L2 controller, to the second request.
Public/Granted literature
- US20200371931A1 CACHE COHERENCE SHARED STATE SUPPRESSION Public/Granted day:2020-11-26
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