Invention Grant
- Patent Title: Method for manufacturing semiconductor structure with hybrid nanostructures
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Application No.: US16697647Application Date: 2019-11-27
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Publication No.: US11257903B2Publication Date: 2022-02-22
- Inventor: Wen-Ting Lan , Guan-Lin Chen , Shi-Ning Ju , Kuo-Cheng Chiang , Chih-Hao Wang , Ching-Wei Tsai , Kuan-Lun Cheng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L27/088 ; H01L29/78 ; H01L21/8234 ; H01L29/66

Abstract:
Semiconductor structures and method for manufacturing the same are provided. The method for manufacturing the semiconductor structure includes forming a first fin structure including first semiconductor material layers and second semiconductor material layers alternately stacked over a substrate and forming an isolation structure surrounding the first fin structure. The method for manufacturing the semiconductor structure also includes forming a first capping layer over the isolation structure and covering a top surface and sidewalls of the first fin structure and etching the isolation structure to form a first gap between the first capping layer and a top surface of the isolation structure. The method for manufacturing the semiconductor structure also includes forming a protection layer covering a sidewall of the first capping layer and filling in the first gap.
Public/Granted literature
- US20210159311A1 SEMICONDUCTOR STRUCTURE WITH HYBRID NANOSTRUCTURES AND METHOD FOR FORMING THE SAME Public/Granted day:2021-05-27
Information query
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