Invention Grant
- Patent Title: Gate formation process
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Application No.: US16800871Application Date: 2020-02-25
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Publication No.: US11264282B2Publication Date: 2022-03-01
- Inventor: Chi-Sheng Lai , Wei-Chung Sun , Li-Ting Chen , Kuei-Yu Kao , Chih-Han Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/308 ; H01L21/3213 ; H01L21/033

Abstract:
Processes to form differently-pitched gate structures are provided. An example method includes providing a workpiece having a substrate and semiconductor fins spaced apart from one another by an isolation feature, depositing a gate material layer over the workpiece, forming a patterned hard mask over the gate material layer, the patterned hard mask including differently-pitched elongated features, performing a first etch process using the patterned hard mask as an etch mask through the gate material layer to form a trench, performing a second etch process using the patterned hard mask as an etch mask to extend the trench to a top surface of the isolation feature, and performing a third etch process using the patterned hard mask to extend the trench into the isolation feature. The first etch process includes use of carbon tetrafluoride and is free of use of oxygen gas.
Public/Granted literature
- US20210265219A1 Gate Formation Process Public/Granted day:2021-08-26
Information query
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