Invention Grant
- Patent Title: Semiconductor device structure with uniform threshold voltage distribution and method of forming the same
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Application No.: US16925703Application Date: 2020-07-10
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Publication No.: US11282942B2Publication Date: 2022-03-22
- Inventor: Wei-Chih Kao , Hsin-Che Chiang , Yu-San Chien , Chun-Sheng Liang , Kuo-Hua Pan
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L27/092 ; H01L21/8238 ; H01L21/033 ; H01L29/78 ; H01L29/06 ; H01L21/762 ; H01L21/324 ; H01L21/768

Abstract:
An embodiment method includes: forming a semiconductor liner layer on exposed surfaces of a fin structure that extends above a dielectric isolation structure disposed over a substrate; forming a first capping layer to laterally surround a bottom portion of the semiconductor liner layer; forming a second capping layer over an upper portion of the semiconductor liner layer; and annealing the fin structure having the semiconductor liner layer, the first capping layer, and the second capping layer thereon, the annealing driving a dopant from the semiconductor liner layer into the fin structure, wherein a dopant concentration profile in a bottom portion of the fin structure is different from a dopant concentration profile in an upper portion of the fin structure.
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Information query
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