Disclosed is a memory device, which includes a buffer die that outputs a first power supply voltage to a first through-substrate via (e.g., through-silicon via (TSV)) and receives a small swing data signal from a second TSV generated based on the first power supply voltage, and a core die that is electrically connected to the buffer die through the first and second TSVs, includes a first cell capacitor electrically connected to the first TSV and configured to block a first noise introduced to the first power supply voltage received through the first TSV. The core die outputs the small swing data signal to the second TSV.