Invention Grant
- Patent Title: Package with fan-out structures
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Application No.: US15874374Application Date: 2018-01-18
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Publication No.: US11322449B2Publication Date: 2022-05-03
- Inventor: Shin-Puu Jeng , Po-Hao Tsai , Po-Yao Chuang , Techi Wong
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/31 ; H01L25/10 ; H01L23/00 ; H01L21/48 ; H01L21/56 ; H01L25/00 ; H01L23/16 ; H01L21/683

Abstract:
Structures and formation methods of chip packages are provided. The method includes disposing a semiconductor die over a carrier substrate. The method also includes disposing an interposer substrate over the carrier substrate. The interposer substrate has a recess that penetrates through opposite surfaces of the interposer substrate. The interposer substrate has interior sidewalls surrounding the semiconductor die, and the semiconductor die is as high as or higher than the interposer substrate. The method further includes forming a protective layer in the recess of the interposer substrate to surround the semiconductor die. In addition, the method includes removing the carrier substrate and stacking a package structure over the interposer substrate.
Public/Granted literature
- US20190131241A1 PACKAGE WITH FAN-OUT STRUCTURES Public/Granted day:2019-05-02
Information query
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