Invention Grant
- Patent Title: Semiconductor chip including back-side conductive layer
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Application No.: US16938206Application Date: 2020-07-24
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Publication No.: US11328955B2Publication Date: 2022-05-10
- Inventor: Ingo Muri , Bernhard Goller
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: DE102017122650.8 20170928
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/302 ; H01L21/321 ; H01L21/78 ; H01L23/528

Abstract:
A substrate wafer arrangement includes a substrate layer having a first main side and a second main side opposite the first main side, the first main side being a front-side and the second main side being a back-side, the substrate layer further having a plurality of semiconductor chips. A polymer structure arranged between the plurality of semiconductor chips extends at least from the front-side of the substrate layer to the back-side of the substrate layer and protrudes from a back-side surface of the substrate layer. The polymer structure separates a plurality of insular islands of conductive material, each insular island corresponding to a respective semiconductor chip of the plurality of semiconductor chips. Semiconductor devices produced from the substrate wafer arrangement are also described.
Information query
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