Invention Grant
- Patent Title: Non-volatile memory with switchable erase methods
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Application No.: US17034086Application Date: 2020-09-28
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Publication No.: US11342029B2Publication Date: 2022-05-24
- Inventor: Ken Oowada , Huai-Yuan Tseng
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: Vierra Magen Marcus LLP
- Main IPC: G11C16/14
- IPC: G11C16/14 ; G11C16/26 ; G11C16/34 ; G11C16/08 ; G11C16/30

Abstract:
To improve the erase process, multiple methods of erasing are utilized. A first method of erasing is relied on at the beginning of life of the memory system. A second method is increasingly relied on as the memory system is used and undergoes many program/erase cycles. In one example, the first method of erase includes applying an erase enable voltage separately to different subsets of the word lines while word lines not receiving the erase enable voltage receive an erase inhibit voltage. In one example, the second method of erase includes applying an erase enable voltage concurrently to all subsets of the word lines.
Public/Granted literature
- US20220101926A1 NON-VOLATILE MEMORY WITH SWITCHABLE ERASE METHODS Public/Granted day:2022-03-31
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