- Patent Title: Integrated circuit comprising a junction field effect transistor
-
Application No.: US17095230Application Date: 2020-11-11
-
Publication No.: US11342449B2Publication Date: 2022-05-24
- Inventor: Jean Jimenez Martinez
- Applicant: STMicroelectronics (Crolles 2) SAS
- Applicant Address: FR Crolles
- Assignee: STMicroelectronics (Crolles 2) SAS
- Current Assignee: STMicroelectronics (Crolles 2) SAS
- Current Assignee Address: FR Crolles
- Agency: Crowe & Dunlevy
- Priority: FR1912782 20191115
- Main IPC: H01L29/808
- IPC: H01L29/808 ; H01L29/66 ; H01L21/8248 ; H01L27/06 ; H01L29/06 ; H01L29/423 ; H01L27/112

Abstract:
An integrated circuit includes a junction field-effect transistor formed in a semiconductor substrate. The junction field-effect transistor includes a drain region, a source region, a channel region, and a gate region. A first isolating region separates the drain region from both the gate region and the channel region. A first connection region connects the drain region to the channel region by passing underneath the first isolating region in the semiconductor substrate. A second isolating region separates the source region from both the gate region and the channel region. A second connection region connects the source region to the channel region by passing underneath the second isolating region in the semiconductor substrate.
Public/Granted literature
- US20210151559A1 INTEGRATED CIRCUIT COMPRISING A JFET TRANSISTOR AND METHOD FOR MANUFACTURING SUCH AN INTEGRATED CIRCUIT Public/Granted day:2021-05-20
Information query
IPC分类: