Invention Grant
- Patent Title: Optical mode optimization for wafer inspection
-
Application No.: US17121174Application Date: 2020-12-14
-
Publication No.: US11347926B2Publication Date: 2022-05-31
- Inventor: Bing-Siang Chao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: G06F30/398
- IPC: G06F30/398 ; G03F7/20 ; H01L21/66 ; G06F111/06 ; G06F30/30 ; G06F119/18 ; G06F119/22

Abstract:
According to some embodiments, the present disclosure provides a method for determining wafer inspection parameters. The method includes identifying an area of interest in an IC design layout, performing an inspection simulation on the area of interest by generating a plurality of simulated optical images from the area of interest using a plurality of optical modes, and selecting, based on the simulated optical images, at least one of the optical modes to use for inspecting an area of a wafer that is fabricated based on the area of interest in the IC design layout.
Public/Granted literature
- US20210097226A1 Optical Mode Optimization for Wafer Inspection Public/Granted day:2021-04-01
Information query