Invention Grant
- Patent Title: Semiconductor packages and forming methods thereof
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Application No.: US16924130Application Date: 2020-07-08
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Publication No.: US11348874B2Publication Date: 2022-05-31
- Inventor: Kai-Chiang Wu , Chin-Liang Chen , Jiun-Yi Wu , Yen-Ping Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L25/00 ; H01L23/31 ; H01L25/065

Abstract:
A semiconductor package includes a redistribution layer structure, a first semiconductor chip, a circuit board structure and an encapsulation layer. The redistribution layer structure has a first side and a second side opposite to the first side. The first semiconductor chip is electrically connected to the first side of the redistribution layer structure. The circuit board structure is electrically connected to the first side of the redistribution layer structure, and the circuit board structure includes a first mask layer having an opening pattern that corresponds to first semiconductor chip. The encapsulation layer laterally encapsulates the circuit board structure and fills in a space between the semiconductor chip and the opening pattern of the first mask layer of the circuit board structure.
Public/Granted literature
- US20220013463A1 SEMICONDUCTOR PACKAGES AND FORMING METHODS THEREOF Public/Granted day:2022-01-13
Information query
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