Invention Grant
- Patent Title: High-density 3D-dram cell with scaled capacitors
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Application No.: US17086628Application Date: 2020-11-02
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Publication No.: US11355496B2Publication Date: 2022-06-07
- Inventor: Mauricio Manfrini , Chung-Te Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L27/108
- IPC: H01L27/108

Abstract:
A semiconductor device comprises a semiconductor substrate, and a pair of metal gates extends upwards from the semiconductor substrate. First and second channel regions are disposed between inner sidewalls of the pair of metal gates. First and second drain regions are disposed between the inner sidewalls of the pair of metal gates and are disposed directly over the first and second channel regions, respectively. First and second source regions are disposed between the inner sidewalls of the pair of metal gates directly below the first and second channel regions, respectively. A capacitor dielectric structure is disposed below the first and second source regions. A bottom capacitor electrode is disposed below the capacitor dielectric. The capacitor dielectric structure separates the first and second drain regions from the bottom capacitor electrode.
Public/Granted literature
- US20210242208A1 HIGH-DENSITY 3D-DRAM CELL WITH SCALED CAPACITORS Public/Granted day:2021-08-05
Information query
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