Invention Grant
- Patent Title: Semiconductor device structures with liners
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Application No.: US14875493Application Date: 2015-10-05
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Publication No.: US11355607B2Publication Date: 2022-06-07
- Inventor: Christopher J. Larsen , David A. Daycock , Kunal Shrotri
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L27/11521
- IPC: H01L27/11521 ; H01L29/788 ; H01L29/423 ; H01L21/308 ; H01L27/11517 ; H01L21/28 ; H01L21/3213 ; H01L27/11558 ; H01L29/06 ; H01L21/02

Abstract:
Methods of forming semiconductor devices, memory cells, and arrays of memory cells include forming a liner on a conductive material and exposing the liner to a radical oxidation process to densify the liner. The densified liner may protect the conductive material from substantial degradation or damage during a subsequent patterning process. A semiconductor device structure, according to embodiments of the disclosure, includes features extending from a substrate and spaced by a trench exposing a portion of a substrate. A liner is disposed on sidewalls of a region of at least one conductive material in each feature. A semiconductor device, according to embodiments of the disclosure, includes memory cells, each comprising a control gate region and a capping region with substantially aligning sidewalls and a charge structure under the control gate region.
Public/Granted literature
- US20160027882A1 SEMICONDUCTOR DEVICES AND STRUCTURES Public/Granted day:2016-01-28
Information query
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