Invention Grant
- Patent Title: Semiconductor package with hybrid through-silicon-vias
-
Application No.: US17089750Application Date: 2020-11-05
-
Publication No.: US11367673B2Publication Date: 2022-06-21
- Inventor: Seok Ling Lim , Bok Eng Cheah , Jackson Chung Peng Kong , Jenny Shio Yin Ong
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Viering, Jentschura & Partner mbB
- Priority: MYPI2020004525 20200902
- Main IPC: H01L23/49
- IPC: H01L23/49 ; H01L23/498 ; H01L21/48 ; H01L21/768 ; H01L23/48 ; H01L25/16 ; H01L23/00

Abstract:
According to various examples, a device is described. The device may include an interposer. The device may also include a plurality of first through-silicon-vias disposed in the interposer, wherein the plurality of first through-silicon-vias have a first diameter. The device may also include a plurality of second through-silicon-vias disposed in the interposer, wherein the plurality of second through-silicon-vias have a second diameter larger than the first via diameter. The device may also include a first recess in the interposer positioned at bottom ends of the plurality of second through-silicon-vias.
Public/Granted literature
- US20220068764A1 SEMICONDUCTOR PACKAGE WITH HYBRID THROUGH-SILICON-VIAS Public/Granted day:2022-03-03
Information query
IPC分类: